(a) Field of the Invention
The present invention relates to a method for forming an interconnection in a semiconductor device, and more particularly to a method for forming a dual damascene interconnection in a semiconductor device.
(b) Description of the Related Art
Recently, as a copper interconnection having an electrical characteristic superior to aluminum (Al) or tungsten (W) has been introduced, a dual damascene process for overcoming a difficulty in dry etching copper is being widely used. In the dual damascene process, a via hole and a trench are first formed, the via hole and the trench are filled with a copper film, and then, a planarization process is performed.
More specifically, an etch stop film and an intermetal insulating film are sequentially formed on a lower metal film, and a via hole is formed using a mask pattern for via hole formation. Next, a trench for exposing the via hole completely is formed using a mask pattern for trench formation. Namely, the via hole is formed under the intermetal insulating film and the trench is formed above the intermetal insulating film.
Subsequently, after exposing the lower metal film by removing the etch stop film exposed through the via hole, a barrier metal film and an upper metal film are sequentially formed.
In the related art method for forming a dual damascene interconnection, a copper (Cu) film is used as the lower metal film, and a nitride film is used as the etch stop film. The removal of the etch stop film formed with the nitride film is performed by a dry etching process.
Accordingly, if the lower metal film is damaged while the etch stop film is removed, there is a problem in that the lower metal film is apt to be corroded when it is exposed to water in the air before and after performing a subsequent process. If the lower metal film is corroded, electrical characteristics and reliability of devices are deteriorated.